160 lines
3.4 KiB
ArmAsm
160 lines
3.4 KiB
ArmAsm
;
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; interrupt.s -- Contains interrupt service routine wrappers.
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; Based on Bran's kernel development tutorials.
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; Rewritten for JamesM's kernel development tutorials.
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; This macro creates a stub for an ISR which does NOT pass it's own
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; error code (adds a dummy errcode byte).
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%macro ISR_NOERRCODE 1
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global isr%1
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isr%1:
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cli ; Disable interrupts firstly.
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push byte 0 ; Push a dummy error code.
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push byte %1 ; Push the interrupt number.
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jmp isr_common_stub ; Go to our common handler code.
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%endmacro
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; This macro creates a stub for an ISR which passes it's own
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; error code.
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%macro ISR_ERRCODE 1
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global isr%1
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isr%1:
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cli ; Disable interrupts.
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push byte %1 ; Push the interrupt number
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jmp isr_common_stub
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%endmacro
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%macro IRQ 2
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global irq%1
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irq%1:
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cli
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push byte 0
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push byte %2
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jmp irq_common_stub
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%endmacro
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ISR_NOERRCODE 0
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ISR_NOERRCODE 1
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ISR_NOERRCODE 2
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ISR_NOERRCODE 3
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ISR_NOERRCODE 4
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ISR_NOERRCODE 5
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ISR_NOERRCODE 6
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ISR_NOERRCODE 7
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ISR_ERRCODE 8
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ISR_NOERRCODE 9
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ISR_ERRCODE 10
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ISR_ERRCODE 11
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ISR_ERRCODE 12
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ISR_ERRCODE 13
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ISR_ERRCODE 14
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ISR_NOERRCODE 15
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ISR_NOERRCODE 16
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ISR_ERRCODE 17
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ISR_NOERRCODE 18
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ISR_NOERRCODE 19
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ISR_NOERRCODE 20
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ISR_NOERRCODE 21
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ISR_NOERRCODE 22
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ISR_NOERRCODE 23
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ISR_NOERRCODE 24
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ISR_NOERRCODE 25
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ISR_NOERRCODE 26
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ISR_NOERRCODE 27
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ISR_NOERRCODE 28
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ISR_NOERRCODE 29
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ISR_ERRCODE 30
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ISR_NOERRCODE 31
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IRQ 0, 32
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IRQ 1, 33
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IRQ 2, 34
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IRQ 3, 35
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IRQ 4, 36
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IRQ 5, 37
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IRQ 6, 38
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IRQ 7, 39
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IRQ 8, 40
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IRQ 9, 41
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IRQ 10, 42
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IRQ 11, 43
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IRQ 12, 44
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IRQ 13, 45
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IRQ 14, 46
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IRQ 15, 47
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; In isr.c
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extern isr_handler
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; This is our common ISR stub. It saves the processor state, sets
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; up for kernel mode segments, calls the C-level fault handler,
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; and finally restores the stack frame.
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isr_common_stub:
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pusha ; Pushes edi,esi,ebp,esp,ebx,edx,ecx,eax
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mov ax, ds ; Lower 16-bits of eax = ds.
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push eax ; save the data segment descriptor
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mov ax, 0x10 ; load the kernel data segment descriptor
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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push esp ; registers_t *r
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; c following sys v requires df to be clear on func entry
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cld
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call isr_handler
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pop eax ; remove our pointer
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pop eax ; reload the original data segment descriptor
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mov ds, bx
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mov es, bx
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mov fs, bx
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mov gs, bx
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popa ; Pops edi,esi,ebp...
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add esp, 8
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iret ; pops 5 things at once: CS, EIP, EFLAGS, SS, and ESP
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; In isr.c
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extern irq_handler
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; our common irq stub. it saves the processor state, sets
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; up for kernel mode segments, calls the c level fault handler
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; and finally restores the stack frame.
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irq_common_stub:
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pusha ; push edi,esi,ebp,esp,ebx,edx,ecx,eax
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mov ax, ds ; lower 16-bits of eax = ds
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push eax ; save the segment descriptor
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mov ax, 0x10 ; load the kernel data segment descriptor
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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push esp
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cld
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call irq_handler
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pop ebx ; remove esp
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pop ebx ; reload the original ds descriptor different than the isr code
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mov ds, bx
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mov es, bx
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mov fs, bx
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mov gs, bx
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popa
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add esp, 8 ;; cleans up the pushed error code and isr number
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iret ; pops cs eip eflags ss and esp
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