331 lines
13 KiB
C
331 lines
13 KiB
C
#include <kernel/chroma.h>
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/************************
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*** Team Kitty, 2020 ***
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*** Chroma ***
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***********************/
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#define PAGE_TABLES_GET_PDPT(address) \
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(address & ((size_t) 0x1FF << 39)) >> 39
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#define PAGE_TABLES_GET_PDP(address) \
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(address & ((size_t) 0x1FF << 30)) >> 30
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#define PAGE_TABLES_GET_PDE(address) \
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(address & ((size_t) 0x1FF << 21)) >> 21
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#define PAGE_TABLES_GET_PT(address) \
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(address & ((size_t) 0x1FF << 12)) >> 12
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// The flag bit, per page, that determines whether this page is present.
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#define PRESENT_BIT 1
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// Default flags for a new page table. 7 = 1 | 2 | 4 = Present, writeable, accessible from userspace
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#define DEFAULT_PAGE_FLAGS 7
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size_t KernelLocation;
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/**
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* Bootstrap the paging process.
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* Seeds the page tables, maps the kernel and framebuffer, etc.
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*
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*/
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void InitPaging() {
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KernelAddressSpace = (address_space_t) {
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.Lock = {0},
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.PML4 = PhysAllocateZeroMem(4096)
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};
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address_space_t BootloaderAddressSpace = (address_space_t) {
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.Lock = {0},
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.PML4 = (size_t*) ReadControlRegister(3)
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};
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size_t AddressToFind = KernelAddr + 0x2000;
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size_t BootldrAddress = 0x8000;
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KernelLocation = DecodeVirtualAddressNoDirect(&BootloaderAddressSpace, AddressToFind);
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SerialPrintf("[ Mem] Double check: Kernel physically starts at 0x%p (0x%p), ends at 0x%p.\r\n", KernelLocation, AddressToFind, KERNEL_END);
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SerialPrintf("[ Mem] Identity mapping the entire 0x%p bytes of physical memory to 0x%p\r\n", FullMemorySize, (size_t) KernelAddressSpace.PML4);
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for(size_t i = 0; i < (FullMemorySize / 4096); i++) {
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size_t Addr = i * 4096;
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MapVirtualPageNoDirect(&KernelAddressSpace, Addr, Addr, DEFAULT_PAGE_FLAGS);
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MapVirtualPageNoDirect(&KernelAddressSpace, Addr, TO_DIRECT(Addr), DEFAULT_PAGE_FLAGS);
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}
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SerialPrintf("[ Mem] Mapping 0x%x bytes of bootloader structure, starting at 0x%p\r\n", bootldr.size, BootldrAddress);
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for(size_t i = BootldrAddress; i < (BootldrAddress + bootldr.size); i += PAGE_SIZE)
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MapVirtualPageNoDirect(&KernelAddressSpace, i, KERNEL_REGION + (i - BootldrAddress), 0x3);
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// This allows the code to actually run
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SerialPrintf("[ Mem] Mapping 0x%x bytes of kernel, starting at 0x%p\r\n", KERNEL_END - KERNEL_PHYSICAL, KERNEL_PHYSICAL);
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for(size_t i = KERNEL_PHYSICAL; i < KERNEL_END; i += PAGE_SIZE)
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MapVirtualPageNoDirect(&KernelAddressSpace, i, (i - KERNEL_PHYSICAL) + KERNEL_REGION + KERNEL_TEXT, 0x3);
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// TODO: The above mapping loses the ELF header.
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// This allows us to write to the screen
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SerialPrintf("[ Mem] Mapping 0x%x bytes of framebuffer, starting at 0x%p\r\n", bootldr.fb_size, FB_PHYSICAL);
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for(size_t i = FB_PHYSICAL; i < bootldr.fb_size + FB_PHYSICAL; i += PAGE_SIZE) {
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MapVirtualPageNoDirect(&KernelAddressSpace, i, i, 0x3); // FD000000 + (page)
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MapVirtualPageNoDirect(&KernelAddressSpace, i, (i - FB_PHYSICAL) + FB_REGION, 0x3); // FFFFFFFFFC000000 + (page)
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}
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// This allows us to call functions
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SerialPrintf("[ Mem] Mapping stack\r\n");
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MapVirtualPageNoDirect(&KernelAddressSpace, CORE_STACK_PHYSICAL, STACK_TOP, 0x3);
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// Make sure everything is sane
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SerialPrintf("[ Mem] Diagnostic: Querying existing page tables\r\n");
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size_t KernelAddress = DecodeVirtualAddressNoDirect(&KernelAddressSpace, AddressToFind);
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SerialPrintf("[ Mem] Diagnostic: Our pagetables put 0x%p at 0x%p + 0x%p.\r\n", AddressToFind, KernelAddress, AddressToFind & ~STACK_TOP);
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SerialPrintf("[ Mem] Diagnostic: Existing pagetables put 0x%p at 0x%p + 0x%p.\r\n", AddressToFind, KERNEL_PHYSICAL, AddressToFind & ~STACK_TOP);
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SerialPrintf("[ Mem] %s\r\n", KernelAddress == KERNEL_PHYSICAL ? "These match. Continuing." : "These do not match. Continuing with caution..");
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SerialPrintf("[ Mem] Attempting to jump into our new pagetables: 0x%p\r\n", (size_t) KernelAddressSpace.PML4);
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WriteControlRegister(3, (size_t) KernelAddressSpace.PML4 & STACK_TOP);
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SerialPrintf("[ Mem] Worked\r\n");
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}
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/**
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* Given the offsets in the page tables, construct a virtual address.
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*
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* Bits 0 to 16 reflect the first digit of the PDPT.
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* @param pdpt Page Directory Pointer Table - Bits 16 to 25
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* @param pdp Page Directory Pointer - Bits 26 to 34
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* @param pde Page Directory Entry - Bits 35 to 43
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* @param pt Page Table - Bits 44 to 52
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* Bits 52 to 64 are the Page Offset.
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*
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* @return size_t The corresponding virtual address
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*/
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size_t ConstructVirtualAddress(size_t pdpt, size_t pdp, size_t pde, size_t pt) {
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return 0 | pdpt << 39 | pdp << 30 | pde << 21 | pt << 12;
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}
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/**
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* Given a virtual address, walk the page tables to retrieve the physical frame.
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* Note that the lowest 12 bits are CLEARED.
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*
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* The page tables are a 4 (5) dimensional array, so this function
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* walks the tables, checking that each step is present, before moving onto the next.
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* NOTE: this can be replaced with a loop.
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* WARNING: this leads to instability.
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* TODO: figure out if we can fix that?
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*
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* @param AddressSpace The address space of the process to walk
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* @param VirtualAddress The address to decode
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* @return size_t The physical frame that the virtual address encodes
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*/
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size_t DecodeVirtualAddress(address_space_t* AddressSpace, size_t VirtualAddress) {
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size_t PDPT = PAGE_TABLES_GET_PDPT(VirtualAddress);
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size_t PDP = PAGE_TABLES_GET_PDP(VirtualAddress);
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size_t PDE = PAGE_TABLES_GET_PDE(VirtualAddress);
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size_t PT = PAGE_TABLES_GET_PT(VirtualAddress);
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size_t* PDPT_T, *PDE_T, *PT_T;
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if(AddressSpace->PML4[PDPT] & PRESENT_BIT)
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PDPT_T = (size_t*) TO_DIRECT(AddressSpace->PML4[PDPT] & STACK_TOP);
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else
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return VirtualAddress;
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if(PDPT_T[PDP] & PRESENT_BIT)
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PDE_T = (size_t*) TO_DIRECT(PDPT_T[PDP] & STACK_TOP);
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else
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return VirtualAddress;
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if(PDE_T[PDE] & PRESENT_BIT)
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PT_T = (size_t*) TO_DIRECT(PDE_T[PDE] & STACK_TOP);
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else
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return VirtualAddress;
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return PT_T[PT] & STACK_TOP;
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}
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/**
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* Walk the tables, generating the structures required to map the specified Physical address to the specified Virtual Address.
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* It generates new intermediary pages as required.
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* The page table entry's flags are set to the specified PageFlags.
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*
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* @param AddressSpace The address space to map this page into
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* @param Physical The physical address to map
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* @param Virtual The virtual address to map into the physical address
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* @param PageFlags Wanted flags for the final page.
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*/
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void MapVirtualPage(address_space_t* AddressSpace, size_t Physical, size_t Virtual, size_t PageFlags) {
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size_t PDPT = PAGE_TABLES_GET_PDPT(Virtual);
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size_t PDP = PAGE_TABLES_GET_PDP(Virtual);
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size_t PDE = PAGE_TABLES_GET_PDE(Virtual);
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size_t PT = PAGE_TABLES_GET_PT(Virtual);
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size_t* PDPT_T, *PDE_T, *PT_T;
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// Read the top level's bits. If it's marked as present..
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if(AddressSpace->PML4[PDPT] & PRESENT_BIT)
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// Set the variable for the next level. Mask off the lower 12 bits, shift it into the "direct region".
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PDPT_T = (size_t*) TO_DIRECT(AddressSpace->PML4[PDPT] & STACK_TOP);
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else {
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// Otherwise, allocate a new page in the direct region.
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PDPT_T = (size_t*) TO_DIRECT(PhysAllocateZeroMem(4096));
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// Pull it down from the direct region, and save it as the level's page for future reads of this block.
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AddressSpace->PML4[PDPT] = FROM_DIRECT(PDPT_T) | DEFAULT_PAGE_FLAGS;
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}
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// The above repeats.
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if(PDPT_T[PDP] & PRESENT_BIT)
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PDE_T = (size_t*) TO_DIRECT(PDPT_T[PDP] & STACK_TOP);
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else {
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PDE_T = (size_t*) TO_DIRECT(PhysAllocateZeroMem(4096));
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PDPT_T[PDP] = FROM_DIRECT(PDE_T) | DEFAULT_PAGE_FLAGS;
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}
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if(PDE_T[PDE] & PRESENT_BIT)
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PT_T = (size_t*) TO_DIRECT(PDE_T[PDE] & STACK_TOP);
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else {
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PT_T = (size_t*) TO_DIRECT(PhysAllocateZeroMem(4096));
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PDE_T[PDE] = FROM_DIRECT(PT_T) | DEFAULT_PAGE_FLAGS;
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}
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// Finally, set the last page table content to the physical page + the flags we specified.
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PT_T[PT] = (size_t) (Physical | PageFlags);
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}
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/**
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* Given a virtual address, walk the page tables to retrieve the physical frame.
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* Note that the lowest 12 bits are CLEARED.
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*
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* This function does not touch the Direct Region, ergo making it suitable for querying
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* the initial memory maps.
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*
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* The page tables are a 4 (5) dimensional array, so this function
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* walks the tables, checking that each step is present, before moving onto the next.
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* NOTE: this can be replaced with a loop.
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* WARNING: this leads to instability.
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* TODO: figure out if we can fix that?
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*
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* @param AddressSpace The address space of the process to walk
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* @param VirtualAddress The address to decode
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* @return size_t The physical frame that the virtual address encodes
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*/
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size_t DecodeVirtualAddressNoDirect(address_space_t* AddressSpace, size_t VirtualAddress) {
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size_t PDPT = PAGE_TABLES_GET_PDPT(VirtualAddress);
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size_t PDP = PAGE_TABLES_GET_PDP(VirtualAddress);
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size_t PDE = PAGE_TABLES_GET_PDE(VirtualAddress);
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size_t PT = PAGE_TABLES_GET_PT(VirtualAddress);
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size_t* PDPT_T, *PDE_T, *PT_T;
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if(AddressSpace->PML4[PDPT] & PRESENT_BIT)
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PDPT_T = (size_t*) (AddressSpace->PML4[PDPT] & STACK_TOP);
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else
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return VirtualAddress;
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if(PDPT_T[PDP] & PRESENT_BIT)
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PDE_T = (size_t*) (PDPT_T[PDP] & STACK_TOP);
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else
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return VirtualAddress;
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if(PDE_T[PDE] & PRESENT_BIT)
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PT_T = (size_t*) (PDE_T[PDE] & STACK_TOP);
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else
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return VirtualAddress;
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return PT_T[PT] & STACK_TOP;
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}
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/**
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* Walk the tables, generating the structures required to map the specified Physical address to the specified Virtual Address.
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* It generates new intermediary pages as required.
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* The page table entry's flags are set to the specified PageFlags.
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*
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* This function does not reference the Direct region.
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* Ergo, it is suitable for initializing the first memory map the kernel needs to use.
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*
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* @param AddressSpace The address space to map this page into
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* @param Physical The physical address to map
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* @param Virtual The virtual address to map into the physical address
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* @param PageFlags Wanted flags for the final page.
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*/
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void MapVirtualPageNoDirect(address_space_t* AddressSpace, size_t Physical, size_t Virtual, size_t PageFlags) {
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size_t PDPT = PAGE_TABLES_GET_PDPT(Virtual);
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size_t PDP = PAGE_TABLES_GET_PDP(Virtual);
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size_t PDE = PAGE_TABLES_GET_PDE(Virtual);
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size_t PT = PAGE_TABLES_GET_PT(Virtual);
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size_t* PDPT_T, *PDE_T, *PT_T;
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// Read the top level's bits. If it's marked as present..
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if(AddressSpace->PML4[PDPT] & PRESENT_BIT)
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// Set the variable for the next level. Mask off the lower 12 bits, shift it into the "direct region".
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PDPT_T = (size_t*) (AddressSpace->PML4[PDPT] & STACK_TOP);
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else {
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// Otherwise, allocate a new page in the direct region.
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PDPT_T = (size_t*) PhysAllocateZeroMem(4096);
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// Pull it down from the direct region, and save it as the level's page for future reads of this block.
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AddressSpace->PML4[PDPT] = (size_t) PDPT_T | DEFAULT_PAGE_FLAGS;
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}
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// The above repeats.
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if(PDPT_T[PDP] & PRESENT_BIT)
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PDE_T = (size_t*) (PDPT_T[PDP] & STACK_TOP);
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else {
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PDE_T = (size_t*) PhysAllocateZeroMem(4096);
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PDPT_T[PDP] = (size_t) PDE_T | DEFAULT_PAGE_FLAGS;
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}
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if(PDE_T[PDE] & PRESENT_BIT)
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PT_T = (size_t*) (PDE_T[PDE] & STACK_TOP);
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else {
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PT_T = (size_t*) PhysAllocateZeroMem(4096);
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PDE_T[PDE] = (size_t) PT_T | DEFAULT_PAGE_FLAGS;
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}
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// Finally, set the last page table content to the physical page + the flags we specified.]
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*(PT_T + PT) = (size_t) (Physical | PageFlags);
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}
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/**
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* Initialize and create a new page table.
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* The higher half of the current page table will be copied into the new one.
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* The lower 4GB will be identity mapped onto itself.
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* Therefore, it will be ready for population for a new process immediately.
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*
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* @param AddressSpace The currently loaded AddressSpace, to seed the higher half
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* @return size_t* The location of the fresh PML4
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*/
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size_t* CreateNewPageTable(address_space_t* AddressSpace) {
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// Allocate the first page
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size_t* NewPML4 = (size_t*) TO_DIRECT(PhysAllocateZeroMem(4096));
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address_space_t TempAddressSpace = (address_space_t) {
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.Lock = {0},
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.PML4 = NewPML4
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};
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// Initialize to zeros
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for(size_t i = 0; i < 512; i++)
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NewPML4[i] = 0;
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// Copy the current Address Space's higher half
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for(size_t i = 255; i < 512; i++)
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NewPML4[i] = AddressSpace->PML4[i];
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// Identity map the bottom two megabytes into the higher half
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for(size_t i = 0; i < 8192; i++) {
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// Get page offset
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size_t Addr = i * 4096;
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// Identity map
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MapVirtualPage(&TempAddressSpace, Addr, Addr, DEFAULT_PAGE_FLAGS);
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// Map higher half
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MapVirtualPage(&TempAddressSpace, Addr, TO_DIRECT(Addr), DEFAULT_PAGE_FLAGS);
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}
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// Identity map the next 4gb
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for(size_t i = 8192; i < 0x100000; i++) {
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size_t Addr = i * 4096;
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MapVirtualPage(&TempAddressSpace, Addr, Addr, DEFAULT_PAGE_FLAGS);
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}
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return NewPML4;
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}
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