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1c1fce9b13
Author | SHA1 | Date | |
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1c1fce9b13 | |||
6470487f2e | |||
3c29c69d14 |
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@ -55,5 +55,5 @@ set_property(SOURCE ${src_no_sse} PROPERTY COMPILE_FLAGS -mgeneral-regs-only)
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add_executable(kernel)
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add_executable(kernel)
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target_sources(kernel PUBLIC ${src_preamble} PUBLIC ${src_files} PUBLIC ${src_no_sse} PUBLIC ${lib_files} PUBLIC ${CMAKE_SOURCE_DIR}/font.o PUBLIC ${src_epilogue})
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target_sources(kernel PUBLIC ${src_preamble} PUBLIC ${src_files} PUBLIC ${src_no_sse} PUBLIC ${lib_files} PUBLIC ${CMAKE_SOURCE_DIR}/font.o PUBLIC ${src_epilogue})
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target_compile_options(kernel PRIVATE -ffreestanding -O0 -Wall -Wextra -Wall -Werror -pedantic -fPIC -fno-exceptions -fno-omit-frame-pointer -mno-red-zone -fno-stack-protector -g)
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target_compile_options(kernel PRIVATE -ffreestanding -O0 -Wall -Wextra -Wall -Werror -pedantic -fPIC -fno-exceptions -fno-omit-frame-pointer -mno-red-zone -fno-stack-protector -ggdb3)
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target_link_options(kernel PRIVATE -T linker.ld -ffreestanding -O2 -nostdlib -nostartfiles -lgcc)
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target_link_options(kernel PRIVATE -T linker.ld -ffreestanding -O2 -nostdlib -nostartfiles -lgcc)
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@ -11,6 +11,31 @@
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extern "C" {
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extern "C" {
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#endif
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#endif
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/*
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;* Memory map
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;* 0h - 600h reserved for the system
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;* 600h - 800h stage1 (MBR/VBR, boot.bin)
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;* 800h - 6C00h stage2 (this)
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;* 6C00h - 7C00h stack (7000h - 700Fh SMP trampoline code)
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;* 8000h - 9000h bootboot structure
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;* 9000h - A000h environment
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* V----------- CAN REMOVE -----------V
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;* A000h - B000h disk buffer / PML4
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;* B000h - C000h PDPE, higher half core 4K slots
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;* C000h - D000h PDE 4K
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;* D000h - E000h PTE 4K
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;* E000h - F000h PDPE, 4G physical RAM identity mapped 2M
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;* F000h - 10000h PDE 2M
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;* 10000h - 11000h PDE 2M
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;* 11000h - 12000h PDE 2M
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;* 12000h - 13000h PDE 2M
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;* 13000h - 14000h PTE 4K
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* ∧----------- CAN REMOVE -----------∧
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;* 14000h - 9F000h core stacks (1k per core)
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;*
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;* At first big enough free hole, initrd. Usually at 1Mbyte.
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*/
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/* ELF headers hate me.
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/* ELF headers hate me.
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* Let's do this the hard way. */
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* Let's do this the hard way. */
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@ -112,6 +112,17 @@
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#define FB_REGION 0xFFFFFFFFFC000000ull // Cannot move!
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#define FB_REGION 0xFFFFFFFFFC000000ull // Cannot move!
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#define FB_PHYSICAL 0x00000000FD000000ull // Physical location of the Framebuffer
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#define FB_PHYSICAL 0x00000000FD000000ull // Physical location of the Framebuffer
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#define KERNEL_REGION 0xFFFFFFFFFFE00000ull // -2MiB, from bootloader
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#define KERNEL_REGION 0xFFFFFFFFFFE00000ull // -2MiB, from bootloader
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#define KERNEL_TEXT 0x0000000000002000ull // Offset of symbols from the kernel text
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#define KERNEL_PHYSICAL KernelLocation // The located kernel from the bootstrap process
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#define KERNEL_END KernelLocation + (KernelEnd - KernelAddr)
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#define CODE_STACK_PHYSICAL 0x0000000000006C00ull // The base of the stack running the C code we enter with
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#define CODE_STACK_END 0x0000000000007C00ull
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#define CORE_STACK_PHYSICAL 0x0000000000014000ull // The first CPU core's stack
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#define CORE_STACK_END 0x0000000000015000ull
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#define STACK_TOP 0xFFFFFFFFFFFFF000ull // The start of the highest stack
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#define MEM_CEILING 0xFFFFFFFFFFFFFFFFull // The top of the stack in the map
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#define USER_REGION 0x00007FFFFFFFFFFFull // Not needed yet, but we're higher half so we might as well be thorough
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#define USER_REGION 0x00007FFFFFFFFFFFull // Not needed yet, but we're higher half so we might as well be thorough
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@ -112,6 +112,26 @@ const char* IntToAscii(int In) {
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}
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}
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static void GetPageFromTables(address_space_t* AddressSpace, size_t VirtualAddress, size_t** Page) {
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//ASSERT(Page != NULL);
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//ASSERT(AddressSpace != NULL);
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size_t* Pagetable = AddressSpace->PML4;
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for(int Level = 4; Level > 1; Level--) {
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size_t* Entry = &Pagetable[(VirtualAddress >> (12u + 9u * (Level - 1))) & 0x1FFU];
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ASSERT(*Entry & PAGE_PRESENT, "Page not present during retrieval");
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SerialPrintf("[ mem] Retrieval of level %d:%d of 0x%p is 0x%p\r\n", Level, (12u + 9u * (Level - 1)), VirtualAddress, (size_t) Entry);
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Pagetable = (size_t*)((char*)(*Entry & 0x7ffffffffffff000ull) + DIRECT_REGION);
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}
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ASSERT(Pagetable[(VirtualAddress >> 12U) & 0x1FFU] & PAGE_PRESENT, "PDPE not present during retrieval");
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*Page = &Pagetable[(VirtualAddress >> 12U) & 0x1FFU];
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}
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void InitPaging() {
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void InitPaging() {
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StackFreeList = (list_entry_t) { &StackFreeList, &StackFreeList };
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StackFreeList = (list_entry_t) { &StackFreeList, &StackFreeList };
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@ -127,8 +147,12 @@ void InitPaging() {
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.PML4 = PhysAllocateZeroMem(PAGE_SIZE)
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.PML4 = PhysAllocateZeroMem(PAGE_SIZE)
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};
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};
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size_t* Pagetable = KernelAddressSpace.PML4;
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//address_space_t InitialPaging = (address_space_t) {
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// .Lock = {0},
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// .PML4 = (size_t*) ReadControlRegister(3)
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//};
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size_t* Pagetable = KernelAddressSpace.PML4;
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//SerialPrintf("[ Mem] About to identity map the higher half.\n");
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//SerialPrintf("[ Mem] About to identity map the higher half.\n");
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// Identity map the higher half
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// Identity map the higher half
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for(int i = 256; i < 512; i++) {
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for(int i = 256; i < 512; i++) {
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@ -152,11 +176,11 @@ void InitPaging() {
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SerialPrintf("[ Mem] Mapping kernel into new memory map.\r\n");
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SerialPrintf("[ Mem] Mapping kernel into new memory map.\r\n");
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//TODO: Disallow execution of rodata and data, and bootldr/environment
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//TODO: Disallow execution of rodata and data, and bootldr/environment
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for(void* Address = CAST(void*, KERNEL_REGION);
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for(void* Address = CAST(void*, KERNEL_PHYSICAL + KERNEL_TEXT);
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Address < CAST(void*, KERNEL_REGION + (KernelEnd - KernelAddr));
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Address < CAST(void*, KERNEL_END);
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Address = CAST(void*, CAST(char*, Address) + PAGE_SIZE)) {
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Address = CAST(void*, CAST(char*, Address) + PAGE_SIZE)) {
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SerialPrintf("[ mem] Mapping 0x%p to 0x%p, relative to kernel at 0x%p\r\n", (CAST(size_t, Address) - KERNEL_REGION) + KernelLocation, Address, (CAST(size_t, Address) - KERNEL_REGION));
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SerialPrintf("[ mem] Mapping 0x%p to 0x%p, relative to kernel at 0x%p\r\n", CAST(size_t, Address), CAST(size_t, (CAST(size_t, Address) - KERNEL_PHYSICAL) + KERNEL_REGION), CAST(size_t, Address) - KERNEL_PHYSICAL);
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MapVirtualMemory(&KernelAddressSpace, Address, (CAST(size_t, Address) - KERNEL_REGION) + KernelLocation, MAP_EXEC);
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MapVirtualMemory(&KernelAddressSpace, CAST(void*, (CAST(size_t, Address) - KERNEL_PHYSICAL) + KERNEL_REGION), CAST(size_t, Address), MAP_EXEC);
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}
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}
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/*for(void* Address = CAST(void*, KERNEL_REGION + 0x2000);
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/*for(void* Address = CAST(void*, KERNEL_REGION + 0x2000);
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@ -165,14 +189,38 @@ void InitPaging() {
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MapVirtualMemory(&KernelAddressSpace, Address, (CAST(size_t, Address) - KERNEL_REGION) + KERNEL_PHYSICAL_2, MAP_EXEC);
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MapVirtualMemory(&KernelAddressSpace, Address, (CAST(size_t, Address) - KERNEL_REGION) + KERNEL_PHYSICAL_2, MAP_EXEC);
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}*/
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}*/
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SerialPrintf("[ mem] Framebuffer at 0x%p, is 0x%p long. Mapping to 0x%p.\r\n", bootldr.fb_ptr, bootldr.fb_size, FB_REGION);
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SerialPrintf("[ mem] Framebuffer at 0x%p, is 0x%p long. Mapping to 0x%p.\r\n", bootldr.fb_ptr, bootldr.fb_size, FB_REGION);
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for(void* Address = CAST(void*, FB_REGION);
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for(void* Address = CAST(void*, FB_PHYSICAL);
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Address < CAST(void*, bootldr.fb_size + FB_REGION);
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Address < CAST(void*, bootldr.fb_size + FB_PHYSICAL);
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Address = CAST(void*, CAST(char*, Address) + PAGE_SIZE)) {
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Address = CAST(void*, CAST(char*, Address) + PAGE_SIZE)) {
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MapVirtualMemory(&KernelAddressSpace, Address, (CAST(size_t, Address) - FB_REGION) + FB_PHYSICAL, MAP_WRITE);
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MapVirtualMemory(&KernelAddressSpace, CAST(void*, (CAST(size_t, Address) - FB_PHYSICAL) + FB_REGION), CAST(size_t, Address), MAP_WRITE);
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}
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}
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SerialPrintf("[ Mem] Kernel mapped into pagetables. New PML4 at 0x%p\r\n", KernelAddressSpace.PML4);
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SerialPrintf("[ mem] Stack at 0x%p, mapping to UNKNOWN, top reaching UNKNOWN\r\n", CODE_STACK_PHYSICAL);
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SerialPrintf("[ mem] Core 1 stack at 0x%p, mapping to 0x%p : 0x%p\r\n", CORE_STACK_PHYSICAL, STACK_TOP, MEM_CEILING);
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for(void* Address = CAST(void*, CORE_STACK_PHYSICAL);
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Address < CAST(void*, CORE_STACK_END);
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Address = CAST(void*, CAST(char*, Address) + PAGE_SIZE)) {
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MapVirtualMemory(&KernelAddressSpace, CAST(void*, STACK_TOP + (CAST(size_t, Address) - CORE_STACK_PHYSICAL)), CAST(size_t, Address), MAP_WRITE);
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}
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SerialPrintf("[ Mem] Kernel mapped into pagetables. New PML4 at 0x%p / 0x%p\r\n", (size_t) KernelAddressSpace.PML4, (size_t) Pagetable);
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SerialPrintf("[ Mem] About to move into our own pagetables.\r\n");
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SerialPrintf("[ Mem] About to move into our own pagetables.\r\n");
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/*size_t pml4e = (0xffffffffffe021ba >> 39) & 0b111111111;
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size_t pdpte = (0xffffffffffe021ba >> 30) & 0b111111111;
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size_t pde = (0xffffffffffe021ba >> 21) & 0b111111111;
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size_t pte = (0xffffffffffe021ba >> 12) & 0b111111111;
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size_t offset = (0xffffffffffe021ba & 0b111111111111);*/
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size_t* selfQuery;
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GetPageFromTables(&KernelAddressSpace, 0xffffffffffe021ba, &selfQuery);
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// This ^ returns the start of the page where the address is located, which includes flags.
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// So we mask them off and add the offset later to retrieve the physical address V
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size_t selfQueryRes = *((volatile size_t*)(selfQuery)) & 0x7ffffffffffff000ull;
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size_t* initialQueryRes = 0; // TODO: Unstable!
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//GetPageFromTables(&InitialPaging, 0xffffffffffe021ba, &initialQueryRes);
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size_t targetAddr = 0xffffffffffe021ba;
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SerialPrintf("[ Mem] Sanity check: Virtual Addr 0x%p maps to physical addr 0x%po vs 0x%pb\r\n", targetAddr, (size_t) selfQueryRes + (targetAddr & 0x1FF), (size_t) initialQueryRes);
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WriteControlRegister(3, (size_t) KernelAddressSpace.PML4);
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WriteControlRegister(3, (size_t) KernelAddressSpace.PML4);
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SerialPrintf("[ Mem] We survived!\r\n");
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SerialPrintf("[ Mem] We survived!\r\n");
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//ASSERT(Allocator != NULL);
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//ASSERT(Allocator != NULL);
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@ -195,24 +243,6 @@ static bool ExpandAllocator(size_t NewSize) {
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return AddPoolToAllocator(Allocator, Pool, AllocSize) != NULL;
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return AddPoolToAllocator(Allocator, Pool, AllocSize) != NULL;
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}
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}
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static void GetPageFromTables(address_space_t* AddressSpace, size_t VirtualAddress, size_t** Page) {
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//ASSERT(Page != NULL);
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//ASSERT(AddressSpace != NULL);
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size_t* Pagetable = AddressSpace->PML4;
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for(int Level = 4; Level > 1; Level--) {
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size_t* Entry = &Pagetable[(VirtualAddress >> (12u + 9u * (Level - 1))) & 0x1FFU];
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ASSERT(*Entry & PAGE_PRESENT, "Page not present during retrieval");
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Pagetable = (size_t*)((char*)(*Entry & 0x7ffffffffffff000ull) + DIRECT_REGION);
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}
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ASSERT(Pagetable[(VirtualAddress >> 12U) & 0x1FFU] & PAGE_PRESENT, "PDPE not present during retrieval");
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*Page = &Pagetable[(VirtualAddress >> 12U) & 0x1FFU];
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}
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void SetAddressSpace(address_space_t* AddressSpace) {
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void SetAddressSpace(address_space_t* AddressSpace) {
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//ASSERT(AddressSpace != NULL);
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//ASSERT(AddressSpace != NULL);
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@ -151,22 +151,22 @@ size_t ReadControlRegister(int CRX) {
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size_t WriteControlRegister(int CRX, size_t Data) {
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size_t WriteControlRegister(int CRX, size_t Data) {
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switch(CRX) {
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switch(CRX) {
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case 0:
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case 0:
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__asm__ __volatile__ ("mov %[dest], %%cr0" : : [dest] "r" (Data) : );
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__asm__ __volatile__ ("movq %[dest], %%cr0" : : [dest] "r" (Data) : );
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break;
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break;
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case 1:
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case 1:
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__asm__ __volatile__ ("mov %[dest], %%cr1" : : [dest] "r" (Data) : );
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__asm__ __volatile__ ("movq %[dest], %%cr1" : : [dest] "r" (Data) : );
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break;
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break;
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case 2:
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case 2:
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__asm__ __volatile__ ("mov %[dest], %%cr2" : : [dest] "r" (Data) : );
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__asm__ __volatile__ ("movq %[dest], %%cr2" : : [dest] "r" (Data) : );
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break;
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break;
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case 3:
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case 3:
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__asm__ __volatile__ ("mov %[dest], %%cr3" : : [dest] "r" (Data) : );
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__asm__ __volatile__ ("movq %[dest], %%cr3" : : [dest] "r" (Data) : );
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break;
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break;
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case 4:
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case 4:
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__asm__ __volatile__ ("mov %[dest], %%cr4" : : [dest] "r" (Data) : );
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__asm__ __volatile__ ("movq %[dest], %%cr4" : : [dest] "r" (Data) : );
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break;
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break;
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case 8:
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case 8:
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__asm__ __volatile__ ("mov %[dest], %%cr8" : : [dest] "r" (Data) : );
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__asm__ __volatile__ ("movq %[dest], %%cr8" : : [dest] "r" (Data) : );
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break;
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break;
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case 'f':
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case 'f':
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__asm__ __volatile__ ("pushq %[dest]\n\t" "popfq" : : [dest] "r" (Data) : "cc");
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__asm__ __volatile__ ("pushq %[dest]\n\t" "popfq" : : [dest] "r" (Data) : "cc");
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Loading…
Reference in New Issue
Block a user