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Fix core detection

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This commit is contained in:
Curle 2022-07-09 19:52:31 +01:00
parent ded76cd0af
commit f066462f29
2 changed files with 22 additions and 19 deletions
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18
inc/kernel/system/core.hpp
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@ -32,14 +32,14 @@ class Core {
Core(){} Core(){}
Core(size_t LAPIC, size_t ID); Core(size_t LAPIC, size_t ID);
size_t ID; size_t ID = 0;
size_t LocalAPIC; size_t LocalAPIC = 0;
address_space_t* AddressSpace; address_space_t* AddressSpace = nullptr;
uint8_t* SyscallStack; uint8_t* SyscallStack = 0;
size_t StackAddress; size_t StackAddress = 0;
uint8_t StackData[Constants::Core::STACK_SIZE]; uint8_t StackData[Constants::Core::STACK_SIZE] = { 0 };
IDT CoreIDT; IDT CoreIDT;
GDT CoreGDT; GDT CoreGDT;
@ -53,15 +53,15 @@ class Core {
static Core* GetCurrent() { static Core* GetCurrent() {
size_t CoreID = 0; size_t CoreID = 0;
__asm__ __volatile__("mov %0, %%fs\n" : "=r"(CoreID) : :); __asm__ __volatile__("mov %0, %%fs\n" : "=r"(CoreID) : :);
return &Processors[CoreID]; return Processors[CoreID];
} }
static Core* GetCore(int ID) { return &Processors[ID]; } static Core* GetCore(int ID) { return Processors[ID]; }
static void Init(); static void Init();
private: private:
static Core Processors[]; static Core* Processors[];
// Initialization vectors for all new cores. // Initialization vectors for all new cores.
// Numbers derived from boot.h space. // Numbers derived from boot.h space.

21
src/system/core.cpp
View File

@ -10,7 +10,7 @@
int Cores = 0; int Cores = 0;
volatile bool Ready = false; volatile bool Ready = false;
Core Core::Processors[Constants::Core::MAX_CORES]; Core* Core::Processors[Constants::Core::MAX_CORES];
TSS64 Tasks[Constants::Core::MAX_CORES]; TSS64 Tasks[Constants::Core::MAX_CORES];
ACPI::MADT::LAPICEntry* LAPICs[Constants::Core::MAX_CORES]; ACPI::MADT::LAPICEntry* LAPICs[Constants::Core::MAX_CORES];
@ -39,7 +39,7 @@ Core::Core(size_t APIC, size_t ID) {
Device::APIC::driver->InitializeCore(APIC, reinterpret_cast<size_t>(initcpu)); Device::APIC::driver->InitializeCore(APIC, reinterpret_cast<size_t>(initcpu));
while (!Ready) { while (!Ready) {
__asm__ ("nop"); __asm__ __volatile__ ("nop");
} }
Ready = false; Ready = false;
@ -61,8 +61,6 @@ void Core::Init() {
// While there are more entries in the table.. // While there are more entries in the table..
while ((size_t) table < MADT::instance->GetEndOfTable()) { while ((size_t) table < MADT::instance->GetEndOfTable()) {
// Move to the next entry (by skipping the length of the current entry)
table = (MADT::RecordTableEntry*) (((size_t) table) + table->Length);
// Check for a LAPIC record (which indicates a unique physical core) // Check for a LAPIC record (which indicates a unique physical core)
if (table->Type == MADT::Type::LAPIC) { if (table->Type == MADT::Type::LAPIC) {
// Find the data for the LAPIC with a reinterpret // Find the data for the LAPIC with a reinterpret
@ -75,18 +73,23 @@ void Core::Init() {
// Move to the next core if there is one. // Move to the next core if there is one.
Cores++; Cores++;
} }
// Move to the next entry (by skipping the length of the current entry)
table = (MADT::RecordTableEntry*) (((size_t) table) + table->Length);
} }
SerialPrintf("[CORE] Found %d cores.\n", Cores); SerialPrintf("[ CORE] Found %d core(s).\r\n", Cores);
if (Cores > 1) if (Cores > 1)
SerialPrintf("[CORE] Bringing up other cores.\n"); SerialPrintf("[ CORE] Bringing up other cores.\r\n");
// For each non-bootstrap core, initialize the necessary data and populate the array. // For each non-bootstrap core, initialize the necessary data and populate the array.
for (int i = 0; i < Cores; i++) { for (int i = 0; i < Cores; i++) {
SerialPrintf("[CORE] Enabling core %d.\n", i);
if (Device::APIC::driver->GetCurrentCore() != LAPICs[i]->Core) if (Device::APIC::driver->GetCurrentCore() != LAPICs[i]->Core) {
Processors[i] = Core(LAPICs[i]->APIC, LAPICs[i]->Core); SerialPrintf("[ CORE] Enabling core %d.\r\n", i);
Core* c = new Core(LAPICs[i]->APIC, LAPICs[i]->Core);
Processors[i] = c;
}
} }
} }