Fix core detection
This commit is contained in:
parent
ded76cd0af
commit
f066462f29
|
@ -29,17 +29,17 @@ struct StackFrame {
|
|||
*/
|
||||
class Core {
|
||||
public:
|
||||
Core() {}
|
||||
Core(){}
|
||||
Core(size_t LAPIC, size_t ID);
|
||||
|
||||
size_t ID;
|
||||
size_t LocalAPIC;
|
||||
size_t ID = 0;
|
||||
size_t LocalAPIC = 0;
|
||||
|
||||
address_space_t* AddressSpace;
|
||||
address_space_t* AddressSpace = nullptr;
|
||||
|
||||
uint8_t* SyscallStack;
|
||||
size_t StackAddress;
|
||||
uint8_t StackData[Constants::Core::STACK_SIZE];
|
||||
uint8_t* SyscallStack = 0;
|
||||
size_t StackAddress = 0;
|
||||
uint8_t StackData[Constants::Core::STACK_SIZE] = { 0 };
|
||||
|
||||
IDT CoreIDT;
|
||||
GDT CoreGDT;
|
||||
|
@ -53,15 +53,15 @@ class Core {
|
|||
static Core* GetCurrent() {
|
||||
size_t CoreID = 0;
|
||||
__asm__ __volatile__("mov %0, %%fs\n" : "=r"(CoreID) : :);
|
||||
return &Processors[CoreID];
|
||||
return Processors[CoreID];
|
||||
}
|
||||
|
||||
static Core* GetCore(int ID) { return &Processors[ID]; }
|
||||
static Core* GetCore(int ID) { return Processors[ID]; }
|
||||
|
||||
static void Init();
|
||||
|
||||
private:
|
||||
static Core Processors[];
|
||||
static Core* Processors[];
|
||||
|
||||
// Initialization vectors for all new cores.
|
||||
// Numbers derived from boot.h space.
|
||||
|
|
|
@ -10,7 +10,7 @@
|
|||
int Cores = 0;
|
||||
volatile bool Ready = false;
|
||||
|
||||
Core Core::Processors[Constants::Core::MAX_CORES];
|
||||
Core* Core::Processors[Constants::Core::MAX_CORES];
|
||||
TSS64 Tasks[Constants::Core::MAX_CORES];
|
||||
ACPI::MADT::LAPICEntry* LAPICs[Constants::Core::MAX_CORES];
|
||||
|
||||
|
@ -39,7 +39,7 @@ Core::Core(size_t APIC, size_t ID) {
|
|||
Device::APIC::driver->InitializeCore(APIC, reinterpret_cast<size_t>(initcpu));
|
||||
|
||||
while (!Ready) {
|
||||
__asm__ ("nop");
|
||||
__asm__ __volatile__ ("nop");
|
||||
}
|
||||
|
||||
Ready = false;
|
||||
|
@ -61,8 +61,6 @@ void Core::Init() {
|
|||
|
||||
// While there are more entries in the table..
|
||||
while ((size_t) table < MADT::instance->GetEndOfTable()) {
|
||||
// Move to the next entry (by skipping the length of the current entry)
|
||||
table = (MADT::RecordTableEntry*) (((size_t) table) + table->Length);
|
||||
// Check for a LAPIC record (which indicates a unique physical core)
|
||||
if (table->Type == MADT::Type::LAPIC) {
|
||||
// Find the data for the LAPIC with a reinterpret
|
||||
|
@ -75,18 +73,23 @@ void Core::Init() {
|
|||
// Move to the next core if there is one.
|
||||
Cores++;
|
||||
}
|
||||
// Move to the next entry (by skipping the length of the current entry)
|
||||
table = (MADT::RecordTableEntry*) (((size_t) table) + table->Length);
|
||||
}
|
||||
|
||||
SerialPrintf("[CORE] Found %d cores.\n", Cores);
|
||||
SerialPrintf("[ CORE] Found %d core(s).\r\n", Cores);
|
||||
|
||||
if (Cores > 1)
|
||||
SerialPrintf("[CORE] Bringing up other cores.\n");
|
||||
SerialPrintf("[ CORE] Bringing up other cores.\r\n");
|
||||
|
||||
// For each non-bootstrap core, initialize the necessary data and populate the array.
|
||||
for (int i = 0; i < Cores; i++) {
|
||||
SerialPrintf("[CORE] Enabling core %d.\n", i);
|
||||
if (Device::APIC::driver->GetCurrentCore() != LAPICs[i]->Core)
|
||||
Processors[i] = Core(LAPICs[i]->APIC, LAPICs[i]->Core);
|
||||
|
||||
if (Device::APIC::driver->GetCurrentCore() != LAPICs[i]->Core) {
|
||||
SerialPrintf("[ CORE] Enabling core %d.\r\n", i);
|
||||
Core* c = new Core(LAPICs[i]->APIC, LAPICs[i]->Core);
|
||||
Processors[i] = c;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
Loading…
Reference in New Issue
Block a user