gwdev/Chroma
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Flailing with Invalid Opcode..

Browse Source
This commit is contained in:
Curle 2020-11-09 18:43:06 +00:00
parent acfe8c2666
commit 429fa55a73
Signed by: TheCurle
GPG Key ID: 5942F13718443F79
2 changed files with 6 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
chroma/inc/kernel/system/io.h
View File

@ -55,7 +55,7 @@ uint32_t WriteMXCSR(uint32_t Data);
size_t ReadControlRegister(int CRX); size_t ReadControlRegister(int CRX);
size_t WriteControlRegister(int CRX, size_t Data); size_t WriteControlRegister(int CRX, size_t Data);
size_t ReadExtendedControlRegister(size_t XCRX); //size_t ReadExtendedControlRegister(size_t XCRX);
size_t WriteExtendedControlRegister(size_t XCRX, size_t Data); size_t WriteExtendedControlRegister(size_t XCRX, size_t Data);
void InvalidatePage(size_t Page); void InvalidatePage(size_t Page);

10
chroma/system/cpu.c
View File

@ -65,13 +65,13 @@ void PrepareCPU() {
SetupInitialGDT(); SetupInitialGDT();
SetupIDT(); SetupIDT();
SetupExtensions(); //SetupExtensions();
InitInterrupts(); InitInterrupts();
} }
void SetupExtensions() { /*void SetupExtensions() {
// Enable SSE // Enable SSE
size_t CR0 = ReadControlRegister(0); size_t CR0 = ReadControlRegister(0);
@ -97,14 +97,14 @@ void SetupExtensions() {
CR0 |= (1 << 1); CR0 |= (1 << 1);
CR0 |= (1 << 2); CR0 |= (1 << 2);
/*CR0 |= (1 << 5); CR0 |= (1 << 5);
CR0 |= (1 << 6); CR0 |= (1 << 6);
CR0 |= (1 << 7);*/ CR0 |= (1 << 7);
SerialPrintf("About to write xcr0: %x\n", CR0); SerialPrintf("About to write xcr0: %x\n", CR0);
WriteExtendedControlRegister(0, CR0); WriteExtendedControlRegister(0, CR0);
} }
*/
void SetupInitialGDT() { void SetupInitialGDT() {
DESC_TBL GDTData = {0}; DESC_TBL GDTData = {0};