Some assorted in-progress work.
This commit is contained in:
parent
acda33948e
commit
3113fb08c3
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@ -11,6 +11,10 @@ set(CMAKE_TRY_COMPILE_TARGET_TYPE STATIC_LIBRARY)
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SET(CMAKE_SYSTEM_NAME Generic)
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SET(CMAKE_SYSTEM_NAME Generic)
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SET(CMAKE_CROSSCOMPILING 1)
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SET(CMAKE_CROSSCOMPILING 1)
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enable_language(ASM)
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enable_language(C)
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enable_language(CXX)
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project(chroma)
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project(chroma)
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SET(src_files
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SET(src_files
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@ -29,11 +33,13 @@ SET(src_files
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${CMAKE_SOURCE_DIR}/src/system/memory/liballoc.cpp
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${CMAKE_SOURCE_DIR}/src/system/memory/liballoc.cpp
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${CMAKE_SOURCE_DIR}/src/system/memory/physmem.c
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${CMAKE_SOURCE_DIR}/src/system/memory/physmem.c
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${CMAKE_SOURCE_DIR}/src/system/process/process.cpp
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${CMAKE_SOURCE_DIR}/src/system/process/process.cpp
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${CMAKE_SOURCE_DIR}/src/system/extern/extern_defs.cpp
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${CMAKE_SOURCE_DIR}/src/drivers/elf.cpp
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${CMAKE_SOURCE_DIR}/src/drivers/elf.cpp
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${CMAKE_SOURCE_DIR}/src/drivers/devices/devices.cpp
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${CMAKE_SOURCE_DIR}/src/drivers/devices/devices.cpp
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${CMAKE_SOURCE_DIR}/src/drivers/devices/input/keyboard.cpp
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${CMAKE_SOURCE_DIR}/src/drivers/devices/input/keyboard.cpp
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${CMAKE_SOURCE_DIR}/src/drivers/devices/io/apic.cpp
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${CMAKE_SOURCE_DIR}/src/drivers/devices/io/apic.cpp
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${CMAKE_SOURCE_DIR}/src/drivers/devices/storage/ata.cpp
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${CMAKE_SOURCE_DIR}/src/drivers/devices/storage/ata.cpp
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${CMAKE_SOURCE_DIR}/src/global/core-att.s
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)
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)
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SET(lib_files
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SET(lib_files
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@ -50,6 +56,9 @@ SET(src_no_sse
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${CMAKE_SOURCE_DIR}/src/system/interrupts.cpp
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${CMAKE_SOURCE_DIR}/src/system/interrupts.cpp
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)
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)
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SET(src_as
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)
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SET(src_preamble
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SET(src_preamble
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${CMAKE_SOURCE_DIR}/src/global/crt0.o
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${CMAKE_SOURCE_DIR}/src/global/crt0.o
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${CMAKE_SOURCE_DIR}/src/global/crti.o
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${CMAKE_SOURCE_DIR}/src/global/crti.o
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@ -69,6 +78,6 @@ set(CMAKE_RUNTIME_OUTPUT_DIRECTORY ${CMAKE_SOURCE_DIR}/bin)
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add_executable(kernel)
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add_executable(kernel)
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target_sources(kernel PUBLIC ${src_preamble} PUBLIC ${src_files} PUBLIC ${src_no_sse} PUBLIC ${lib_files} PUBLIC ${src_epilogue})
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target_sources(kernel PUBLIC ${src_preamble} PUBLIC ${src_files} PUBLIC ${src_no_sse} PUBLIC ${lib_files} PUBLIC ${src_as} PUBLIC ${src_epilogue})
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target_compile_options(kernel PRIVATE -ffreestanding -O0 -Wall -Wextra -Wall -Werror -fPIC -fno-exceptions -fno-omit-frame-pointer -mno-red-zone -fno-stack-protector -fno-rtti -ggdb3)
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target_compile_options(kernel PRIVATE -ffreestanding -O0 -Wall -Wextra -Wall -Werror -fPIC -fno-exceptions -fno-omit-frame-pointer -mno-red-zone -fno-stack-protector $<$<COMPILE_LANGUAGE:CXX>:-fno-rtti> -ggdb3)
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target_link_options(kernel PRIVATE -T ${CMAKE_SOURCE_DIR}/linker.ld -ffreestanding -O2 -nostdlib -nostartfiles -lgcc)
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target_link_options(kernel PRIVATE -T ${CMAKE_SOURCE_DIR}/linker.ld -ffreestanding -O2 -nostdlib -nostartfiles -lgcc)
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128
src/global/core-att.s
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128
src/global/core-att.s
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@ -0,0 +1,128 @@
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#************************
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#*** Team Kitty, 2021 ***
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#*** Chroma ***
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#************************
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# Initial startup routines for new cores.
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# New cores start in 16 bit real mode.
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# Because of this, this is the only necessary assembler file in the OS.
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# First, bring them up to Protected and Long mode.
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# Then enable all necessary auxiliary features.
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# Pass off to the CPP code to handle the heavy work, we just want the core running.
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.code16
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.equ BASE, 0x1000
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.global stack
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.extern initcpu
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.extern coreidt
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.extern CoreGDT
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# 16-bit startup.
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# Initialize registers.
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# Load GDT
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# Set flags
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# Immediately jump to protected mode.
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.global startCore
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startCore:
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cli
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mov $0x0, %ax
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mov %ax, %ds
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mov %ax, %es
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mov %ax, %fs
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mov %ax, %gs
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mov %ax, %ss
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lgdtl gdt_protected
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mov %cr0, %eax
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or $0x1, %ax
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mov %eax, %cr0
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ljmpl $0x8, $startCore32
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.code32
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# Protected mode setup.
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# Set page tables
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# Set PAE
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# Immediately jump to long mode.
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.section .text
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startCore32:
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mov $0x10, %bx
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mov %bx, %ds
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mov %bx, %es
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mov %bx, %ss
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mov $0xA000, %eax
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mov %eax, %cr3
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mov %cr4, %eax # Enable PAE
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or $32, %eax # 1 << 5
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or $128, %eax # 1 << 7
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mov %eax, %cr4
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mov $0xC0000080, %ecx
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rdmsr
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or $256, %eax # 1 << 8
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wrmsr
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mov %cr0, %eax
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or $2147483648, %eax # 1 << 31
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mov %eax, %cr0
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lgdt gdt_long
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ljmp $0x8, $startCore64
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# Long mode setup.
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# Prepare registers.
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# Set flags
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# Load the final GDT and IDT
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# Jump to the leave function.
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.code64
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startCore64:
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mov $0x10, %ax
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mov %ax, %ds
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mov %ax, %es
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mov %ax, %ss
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mov $0x0, %ax
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mov %ax, %ds
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mov %ax, %gs
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lgdt CoreGDT
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lidt coreidt
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mov $0x0, %rbp
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push $0
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popf
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mov (leave), %rax
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jmp leave
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# Final setup.
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# Set some flags in registers.
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# Jump into C++ code.
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leave:
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push %rbp
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mov %cr0, %rax
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btr $2, %eax
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bts $1, %eax
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mov %rax, %cr0
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mov %cr4, %rax
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bts $9, %eax
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bts $10, %eax
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mov %rax, %cr4
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call initcpu
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.global endCore
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endCore:
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@ -1,27 +1,29 @@
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;************************
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.intel_syntax noprefix
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;*** Team Kitty, 2021 ***
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#************************
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;*** Chroma ***
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#*** Team Kitty, 2021 ***
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;************************
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#*** Chroma ***
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#************************
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; Initial startup routines for new cores.
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# Initial startup routines for new cores.
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; New cores start in 16 bit real mode.
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# New cores start in 16 bit real mode.
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; Because of this, this is the only necessary assembler file in the OS.
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# Because of this, this is the only necessary assembler file in the OS.
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; First, bring them up to Protected and Long mode.
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# First, bring them up to Protected and Long mode.
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; Then enable all necessary auxiliary features.
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# Then enable all necessary auxiliary features.
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; Pass off to the CPP code to handle the heavy work, we just want the core running.
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# Pass off to the CPP code to handle the heavy work, we just want the core running.
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[bits 16]
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.intel_syntax
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BASE equ 0x1000
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global stack
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.code16
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extern initcpu
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.equ BASE, 0x1000
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extern coreidt
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.global stack
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extern coregdt
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.extern initcpu
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global startCore
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.extern coreidt
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startCore:
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.extern coregdt
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.global startCore
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cli
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cli
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mov ax, 0x0
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mov ax, 0x0
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mov ds, ax
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mov ds, ax
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@ -38,9 +40,9 @@ startCore:
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jmp 0x8:(startCore32 - startCore + BASE)
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jmp 0x8:(startCore32 - startCore + BASE)
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[bits 32]
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.code32
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section .text
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.section .text
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startCore32:
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startCore32:
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mov bx, 0x10
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mov bx, 0x10
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mov ds, bx
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mov ds, bx
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lgdt [gdt_long - startCore + BASE]
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lgdt [gdt_long - startCore + BASE]
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jmp 8:(startCore64 - startCore + BASE)
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jmp 8:(startCore64 - startCore + BASE)
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[bits 64]
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.code64
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startCore64:
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startCore64:
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mov ax, 0x10
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mov ax, 0x10
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mov ds, ax
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mov ds, ax
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@ -25,7 +25,6 @@ extern "C" void initcpu() {
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__asm__ __volatile__("mov %%fs, %0" : : "r" (Device::APIC::driver->GetCurrentCore()) : );
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__asm__ __volatile__("mov %%fs, %0" : : "r" (Device::APIC::driver->GetCurrentCore()) : );
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SerialPrintf("[CORE] Core %d ready.\r\n", Device::APIC::driver->GetCurrentCore());
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SerialPrintf("[CORE] Core %d ready.\r\n", Device::APIC::driver->GetCurrentCore());
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// TODO: New GDT
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__asm__ __volatile__("cli");
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__asm__ __volatile__("cli");
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Ready = true;
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Ready = true;
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__asm__ __volatile__("sti");
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__asm__ __volatile__("sti");
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@ -44,6 +44,11 @@ __attribute__((aligned(64))) static volatile size_t InitGDT[5] = {
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0
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0
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};
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};
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__attribute__((aligned(64))) static DESC_TBL CoreGDT = {
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.Limit = sizeof(InitGDT),
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.Base = (size_t) InitGDT
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};
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__attribute__((aligned(64))) static volatile TSS64 TSSEntries;
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__attribute__((aligned(64))) static volatile TSS64 TSSEntries;
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__attribute__((aligned(64))) static volatile IDT_GATE IDTEntries[256];
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__attribute__((aligned(64))) static volatile IDT_GATE IDTEntries[256];
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@ -111,7 +116,6 @@ void PrepareCPU() {
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*/
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*/
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void SetupInitialGDT() {
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void SetupInitialGDT() {
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DESC_TBL GDTData;
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size_t TSSBase = (uint64_t) (&TSSEntries);
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size_t TSSBase = (uint64_t) (&TSSEntries);
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uint16_t TSSLower = (uint16_t) TSSBase;
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uint16_t TSSLower = (uint16_t) TSSBase;
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@ -119,15 +123,13 @@ void SetupInitialGDT() {
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uint8_t TSSMid2 = (uint8_t) (TSSBase >> 24);
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uint8_t TSSMid2 = (uint8_t) (TSSBase >> 24);
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uint32_t TSSHigher = (uint32_t) (TSSBase >> 32);
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uint32_t TSSHigher = (uint32_t) (TSSBase >> 32);
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GDTData.Limit = sizeof(InitGDT) - 1;
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GDTData.Base = (size_t) InitGDT;
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((TSS_ENTRY*) (&((GDT_ENTRY*) InitGDT)[3]))->BaseLow = TSSLower;
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((TSS_ENTRY*) (&((GDT_ENTRY*) InitGDT)[3]))->BaseLow = TSSLower;
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((TSS_ENTRY*) (&((GDT_ENTRY*) InitGDT)[3]))->BaseMid1 = TSSMid1;
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((TSS_ENTRY*) (&((GDT_ENTRY*) InitGDT)[3]))->BaseMid1 = TSSMid1;
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((TSS_ENTRY*) (&((GDT_ENTRY*) InitGDT)[3]))->BaseMid2 = TSSMid2;
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((TSS_ENTRY*) (&((GDT_ENTRY*) InitGDT)[3]))->BaseMid2 = TSSMid2;
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((TSS_ENTRY*) (&((GDT_ENTRY*) InitGDT)[3]))->BaseHigh = TSSHigher;
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((TSS_ENTRY*) (&((GDT_ENTRY*) InitGDT)[3]))->BaseHigh = TSSHigher;
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WriteGDT(GDTData);
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WriteGDT(CoreGDT);
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WriteTSR(3 << 3);
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WriteTSR(3 << 3);
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RefreshCS();
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RefreshCS();
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}
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}
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55
src/system/extern/extern_defs.cpp
vendored
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55
src/system/extern/extern_defs.cpp
vendored
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@ -0,0 +1,55 @@
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/************************
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*** Team Kitty, 2022 ***
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*** Chroma ***
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***********************/
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#include <kernel/system/descriptors.h>
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/**
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* Contains definitions that are used by external files.
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* That means, independent programs or assembler files.
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*/
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/**
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* The template GDT entry for a newly initialized core.
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* Protected Mode.
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* TODO: Document what the entries here are.
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*/
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__attribute__((aligned(64))) size_t ProtectedGDTEntry[3] = {
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0,
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0x00CF9A000000FFFF,
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0x00CF92000000FFFF
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};
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/**
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* The GDT table value to be loaded into each newly initialized core.
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* Protected Mode.
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*/
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DESC_TBL ProtectedGDT = {
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.Limit = sizeof(ProtectedGDTEntry) - 1,
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.Base = (size_t) &ProtectedGDTEntry
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};
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/**
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* The template GDT entry for a newly initialized core.
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* Long Mode.
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* TODO: Document what the entries here are.
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*/
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__attribute__((aligned(64))) size_t LongGDTEntry[3] = {
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0,
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0x00AF98000000FFFF,
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0x00CF92000000FFFF
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};
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/**
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* The GDT table value to be loaded into each newly initialized core.
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* Long Mode.
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*/
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DESC_TBL LongGDT = {
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.Limit = sizeof(LongGDTEntry) - 1,
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.Base = (size_t) &LongGDTEntry
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};
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@ -7,6 +7,7 @@
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*** Chroma ***
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*** Chroma ***
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***********************/
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***********************/
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#ifdef __cplusplus
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#ifdef __cplusplus
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extern "C" {
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extern "C" {
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#endif
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#endif
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Reference in New Issue
Block a user